TTL Computer

This rudimentary computer uses only TTL chips and memory chips.

Architecture

SUBLEQ

This project was inspired by YouTube video A CPU With Just One Instruction!!! which introduced me to the SUBLEQ computer (SUBtract and branch if Less than or Equal to Zero). SUBLEQ is a type of OISC (One-Instruction Set Computer). I thought about building a SUBLEQ computer. But after learning more about it, I realized that this ultimate simplification came at a terrible price. The software must continually work-around the severe limitations of the hardware, complicating even the most trivial operations, and making computation slow and inefficient.

QSIC

By keeping the concept of a single instruction, but adding a few needed features, computation can be much faster and more efficient. I call this new architecture "QSIC", which stands for "Quasi-Single-Instruction Computer". The term "quasi" is added to acknowlege that it may not officially qualify as a single-instruction computer with these additions. Here is a comparison between SUBLEQ and QSIC:

Bus Width

An important architectural choice is the widths of the address and data buses. It is tempting to use an 8-bit data bus and a 16-bit address bus, as did early microprocessors such as the 6502. But this would mean that some operations are 8-bit (when operating on data), and some operations are 16-bit (when operating on addresses). This is inconsistent with the QSIC philosophy of minimal complexity. So QSIC uses 16-bits for both the address and data buses, which requires only 16-bit operations.

Registers

Another architectural choice is the number of registers and their capabilities. QSIC has no traditional accumulators, index registers, or stack pointers. RAM is used to store all data and addresses. Data that would normally be stored in an accumulator is instead stored in RAM. An address that would normally be stored in an index register is also stored in RAM. The "indirect" addressing mode permits an address stored in RAM to be used like an index register or stack pointer. QSIC still has a traditional program counter, and also a microcode program counter.

Microcode

Initially, I had hoped that QSIC would be simple enough to allow the hardware control signals to be controlled by combinational logic. But ultimately, I found that using microcode was simpler. For each QSIC instruction, the sequence of hardware control signals needed to execute the instruction is retrieved from the microcode ROM.

Work in Progress

Much more information will be published on this page, including links to the hardware design files and software. I need time to make this content presentable. Please check this page for updates periodically if you are interested.